this document is for maintenance purposes only and is not recommended for new designs
sp8605 1000mhz 4 4 4 4 4 2 SP8606 1300mhz 4 4 4 4 4 2 ds3659-12 the sp8605 and SP8606 are emitter coupled logic dividers with eclll compatible outputs when used with external pulldown resistors. specified from 0c to 1 70c, these devices feature ac coupled inputs and 600mv p-p clock input sensitivity. features n ecl compatible outputs n ac-coupled inputs (internal bias) quick reference data n supply voltage: 2 52v n power consumption: 320mw n temperature range: 0c to 1 70c fig. 1 pin connections - top view dg14 ordering information sp8605 b dg sp8605 na 1c SP8606 b dg v cc (0v) nc nc output output nc nc nc nc nc clock input nc internal bias decoupling v ee 1 2 3 4 5 6 7 14 13 12 11 10 9 8 sp8605 SP8606 absolute maximum ratings supply voltage, v ee output current storage temperature range max. junction temperature max. clock input voltage 2 8v 15ma 2 65c to 1 150c 1 175c 25v p-p fig. 2 functional diagram divide by 2 v cc (0v) internal bias decoupling clock input v ee output output 614 11 10 7 4 advance information
2 sp8605/6 maximum frequency (sinewave input) minimum frequency (sinewave input) current consumption output low voltage output high voltage minimum output swing f max f min i ee v ol v oh v out 10 13 2 192 2 093 500 min. max. 150 100 2 162 2 075 value notes ghz ghz mhz ma v v mv 5 5 3 4 4 input = 400-1200mv p-p input = 400-1200mv p-p input = 600-1200mv p-p v ee = 2 545v, outputs unloaded v ee = 2 52v, r l = 430 (25c) v ee = 2 52v, r l = 430 (25c) v ee = 2 52v, r l = 430 electrical characteristics unless otherwise stated, the electrical characteristics are guaranteed over specified supply, frequency and temperature range supply voltage, v cc = 0v, v ee = 2 52v 6 025v temperature, t amb = 0c to 1 70c conditions symbol characteristic type sp8605b SP8606b all all all all all fig. 3 typical input characteristics of sp8605b and SP8606b thermal characteristics u jc approximately 30c/w u ja approximately 110c/w operating notes 1. the clock input (pin 4) should be capacitively coupled to the signal source. the input signal path is completed by connecting a capacitor from the internal bias decoupling, pin 6, to ground. 2. in the absence of a signal the device will self-oscillate. if this is undesirable, it may be prevented by connecting a 10k resistor from the unused input to v ee i.e. from pin 4 to pin 7. this will reduce the input sensitivity by approximately 100mv. 3. the circuit will operate at very low input frequencies but slew rate must be better than 200v/s. 4. the input impedance of the sp8605/6 is a function of frequency, see fig. 4. 5. the emitter follower outputs require external load resistors. these should not be less than 330 and a value of 430 is recommended. interfacing to ecllll/10k is shown in fig. 7. 6. these devices may be used with split suopply lines and ground referenced input; a suitable configuration is shown in fig. 6. 7. all components should be suitable for the frequency in use. units notes 1. the temperature coefficients of v oh = 1 12mv/c, and v ol = 1 024mv/c but these are not tested. 2. the test configuration for dynamic testing is shown in fig.5. 3. tested at 25c and 1 70c only. 4. tested at 25c only 5. tested at 1 70c only. 1400 1200 1000 800 600 400 200 0 0 100 200 300 400 500 600 700 800 900 1000 1100 1200 1300 input frequency (mhz) input amplitude (mv p-p) * tested as specified in table of electrical characteristics guaranteed * operating window sp8605b SP8606b t amb = 1 70 c
3 sp8605/6 dut 50 50 1n 1n to sampling scope v ee = 2 52v 6 025v 14 11 10 7 6 4 10n 1n 10n 33 20 monitor 50 w signal source 33 2 5db attenuator network 430 430 v cc = 0v fig. 4 typical input impedance. test conditions: supply voltage = 2 52v, ambient temperature = 25c, frequencies in mhz, impedances normalised to 50 fig. 5 toggle frequency test circuit fig. 6 circuit for using the input signal about ground potential sp8605/6 50 50 1n 1n output v ee = 2 22v 14 11 10 7 6 4 10n 50 input from 50 w output 430 430 1 3v 10n output j 2 j 1 j 0.5 j 0.2 0 2 j 0.2 2 j 0.5 2 j 1 2 j 2 1 0.5 0.2 j 5 2 j 5 2 5 900 600 800 700 500 1000 1100 1200 1300
4 sp8605/6 sp8605/6 2 52v 430 430 v cc = 0v ecllll ecl10k sp8605/6 2 52v 15k 0v ecllll ecl10k 47 q q low power interfacing fig. 7 interfacing sp8605/6 to ecl10k and ecllll fig. 8 typical application showing interfacing 10 11 7 400 4 6 14 bias ecl output 430 1n 1n 1n 430 2 52v input divide by 2
5 sp8605/6 notes
6 sp8605/6 headquarters operations gec plessey semiconductors cheney manor, swindon, wiltshire sn2 2qw, united kingdom. tel: (0793) 518000 fax: (0793) 518411 gec plessey semiconductors p.o. box 660017 1500 green hills road, scotts valley, ca95067-0017 united states of america. tel (408) 438 2900 fax: (408) 438 5576 customer service centres l france & benelux les ulis cedex tel: (1) 64 46 23 45 fax : (1) 64 46 06 07 l germany munich tel: (089) 3609 06-0 fax : (089) 3609 06-55 l italy milan tel: (02) 66040867 fax: (02) 66040993 l japan tokyo tel: (3) 5276-5501 fax: (3) 5276-5510 l north america scotts valley, usa tel: (408) 438 2900 fax: (408) 438 7023. l south east asia singapore tel: (65) 3827708 fax: (65) 3828872 l sweden stockholm tel: 46 8 702 97 70 fax: 46 8 640 47 36 l uk, eire, denmark, finland & norway swindon tel: (0793) 518510 fax : (0793) 518582 these are supported by agents and distributors in major countries world-wide. ? gec plessey semiconductors 1994 publication no. ds3659 issue no. 1.2 march 1994 this publication is issued to provide information only which (unless agreed by the company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. no warranty or guarantee express or implied is made regard ing the capability, performance or suitability of any product or service. the company reserves the right to alter without prior knowledge the specification, design or price of any product or service. information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. it is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. these products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. all products and materials are sold and services provided subject to the company's conditions of sale, w hich are available on request. package details dimensions are shown thus: mm (in). 051 (002) min 14 leads at 254 (010) nom. spacing 036/058 (0014/023) 2032 (0800) max 559/787 (0220/0310) 14-lead ceramic dil C dg14 1 14 318/406 (0125/0160) pin 1 ref notch 020/036 (0008/0014) 762 (03) nom ctrs 508/(020) max 114/165 (0045/0065) seating plane notes 1. controlling dimensions are inches. 2. this package outline diagram is for guidance only. please contact your gps customer service centre for further information.
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